1. Field of the Invention
This invention relates generally to the field of computer graphics and, more particularly, to high performance graphics systems.
2. Description of the Related Art
A computer system typically relies upon its graphics system for producing visual output on the computer screen or display device. Early graphics systems were only responsible for taking what the processor produced as output and displaying it on the screen. In essence, they acted as simple translators or interfaces. Modem graphics systems, however, incorporate graphics processors with a great deal of processing power. They now act more like coprocessors rather than simple translators. This change is due to the recent increase in both the complexity and amount of data being sent to the display device. For example, modem computer displays have many more pixels, greater color depth, and are able to display more complex images with higher refresh rates than earlier models. Similarly, the images displayed are now more complex and may involve advanced techniques such as anti-aliasing and texture mapping.
As a result, without considerable processing power in the graphics system, the CPU would spend a great deal of time performing graphics calculations. This could rob the computer system of the processing power needed for performing other tasks associated with program execution and thereby dramatically reduce overall system performance. With a powerful graphics system, however, when the CPU is instructed to draw a box on the screen, the CPU is freed from having to compute the position and color of each pixel. Instead, for example, the CPU may send a request to the video card stating, xe2x80x9cdraw a box at these coordinates.xe2x80x9d The graphics system then draws the box, freeing the processor to perform other tasks.
Generally, a graphics system in a computer is a type of video adapter that contains its own processor to boost performance levels. These processors are specialized for computing graphical transformations, so they tend to achieve better results than the general-purpose CPU used by the computer system. In addition, they free up the computer""s CPU to execute other commands while the graphics system is handling graphics computations. The popularity of graphical applications, and especially multimedia applications, has made high performance graphics systems a common feature of computer systems. Most computer manufacturers now bundle a high performance graphics system with their systems.
Since graphics systems typically perform only a limited set of functions, they may be customized and therefore far more efficient at graphics operations than the computer""s general-purpose central processor. While early graphics systems were limited to performing two-dimensional (2-D) graphics, their functionality has increased to support three-dimensional (3-D) wire-frame graphics, 3-D solids, and now includes support for three-dimensional (3-D) graphics with textures and special effects such as advanced shading, fogging, alpha-blending, and specular highlighting. Furthermore, graphics systems typically include many specialized processing units to handle the various tasks involved in processing complex 2-D and/or 3-D graphical data.
Rendering, the process of creating images from graphical data, is a time-consuming operation. Graphical data may comprise one or more graphics primitives. As used herein, the term xe2x80x9cgraphics primitivexe2x80x9d includes polygons, parametric surfaces, splines, NURBS (non-uniform rational B-splines), sub-divisions, surfaces, fractals, volume primitives, and particle systems. These graphics primitives are described in detail in the textbook entitled Computer Graphics: Principles and Practice by James D. Foley, et al., published by Addison-Wesley Publishing Co., Inc., 1996. A large number of calculations are required to render the various properties of a primitive, including coordinate and color data. To increase performance, it is therefore desirable to reduce the number of primitives which are rendered. Clipping is one means of reducing the expense of rendering by rejecting primitives and portions of primitives which lie outside a clipping boundary. The clipping boundary is defined by a viewport, which, as used herein, is a region in two or three dimensions which defines an area that is to be displayed. A clipped portion of an object is typically discarded from the graphics pipeline and therefore not rendered.
Clip testing is an operation that often occurs prior to clipping itself, or as the first step in clipping. Clip testing involves determining if a geometric primitive is entirely inside the clipping boundary so that it can be trivially accepted, if it is entirely outside the clipping boundary so that it can be trivially rejected, or if it needs to be clipped. Clip testing further reduces the expense of rendering by eliminating unnecessary and time-consuming clipping operations.
Previous approaches have not efficiently used the multiple, specialized processing units of a graphics system for clipping and clip testing. A graphics system with improved clipping and clip testing capabilities is therefore desired.
The present invention comprises a computer graphics system which employs an improved method of clip testing using one clip register per vertex and/or using multiple processing units. In one embodiment, the graphics system may include multiple processing units such as one or more rendering units and/or one or more frame buffer controllers. The frame buffer controller may be comprised in a conventional frame buffer or a super-sampled frame buffer (i.e., a sample buffer).
The graphics system processes graphical data for display on a display device. A display screen of the display device displays the contents of a viewport which is defined by a regular clipping boundary. In one embodiment, six planes, that is, two opposing planes for three dimensions, may define the regular clipping boundary. An additional guard band clipping boundary may encompass two dimensions and may therefore be defined by four planes.
In one embodiment, clip testing is the task of determining whether a geometric primitive is to be clipped or not clipped. Three possible outcomes of clip testing are trivial rejection, trivial acceptance, and the need to clip. Trivial rejection is the determination that a geometric primitive lies wholly outside the viewport and should therefore be discarded. Trivial acceptance is the determination that a geometric primitive lies wholly inside the viewport and is therefore to be kept for further processing. If a geometric primitive is not trivially rejected or trivially accepted, then it is clipped.
In one embodiment, a processor such as a rendering unit tests the vertices of a geometric primitive against the various planes of the clipping boundary and sets the bits in one or more clip bits registers accordingly. The rendering unit sets the bits in the clip bits register on a per-vertex basis: that is, without analyzing the relationship of the geometric primitive as a whole to the clipping boundary.
In one embodiment, the clip bits register (also referred to as a clip register) is a general-purpose, 32-bit status register which may contain clip bits information for a vertex of a geometric primitive. In one embodiment, each vertex of a geometric primitive has its own 32-bit clip bits register. The clip bits register may comprise ten bits: six for the six regular clipping planes (x, y, z) and four for the four guard band clipping planes (x, y). Each bit in the registers is set to xe2x80x9c1xe2x80x9d if the vertex is outside the clipping boundary with respect to a particular clipping plane or xe2x80x9c0xe2x80x9d if the vertex is inside the clipping boundary with respect to the particular clipping plane. Various embodiments may include additional rules to handle boundary situations. In various embodiments, each vertex may have up to eight additional bits to indicate whether the vertex is inside or outside of model clipping planes. Model clipping planes are additional clipping planes which may be located arbitrarily in space and which may be used to further model an object.
In one embodiment, the rendering unit then sends the vertices of the geometric primitive to a frame buffer controller or other graphics processor. The bits of the clip bits register or registers are also sent to the frame buffer controller and stored in general-purpose registers. The geometric primitive is assembled in the frame buffer controller from the vertices sent by the rendering unit. The frame buffer controller then performs clip testing of the assembled geometric primitive. In one embodiment, the frame buffer controller performs Boolean operations on bits from the clip bits register or clip bits registers to determine whether the geometric primitive should be trivially accepted, trivially rejected, or clipped. In various embodiments, these clip testing operations may be performed in software, in hardware, or in a combination of software and hardware.
A 3-D dot may be trivially rejected if it is outside of any clip plane. In other words, a dot may be trivially rejected if a Boolean AND operation on the single clip bits register and a trivial reject mask yields a nonzero result. The trivial reject mask comprises 1""s in the appropriate positions to select the appropriate bits from the clip bits. A 3-D line or vector may be trivially rejected if both of its vertices are outside of at least one particular clip plane. In other words, a line or vector may be trivially rejected if Boolean AND operations on the two clip bits registers and a trivial reject mask yield a nonzero result. A 3-D triangle may be trivially rejected if all three of its vertices are outside of at least one particular clip plane. In other words, a triangle may be trivially rejected if Boolean AND operations on the three clip bits registers and a trivial reject mask yield a nonzero result.
In various embodiments, the determination of trivial acceptance may take place before, after, or substantially simultaneously with the determination of trivial rejection. A 3-D dot may be trivially accepted if it is inside of all three clip planes. In other words, a dot may be trivially accepted if a Boolean AND operation on the inversion of the single clip bits register and a trivial accept mask yields a result of zero. The trivial accept mask comprises 1""s in the appropriate positions to select the appropriate bits from the clip bits. A 3-D line or vector may be trivially accepted if it is inside of all three clip planes. In other words, a line or vector may be trivially accepted if a Boolean AND operation on the inversion of the Boolean disjunction of the two clip bits registers and a trivial accept mask yields a result of zero. A 3-D triangle may be trivially accepted if it is inside of all three clip planes. In other words, a triangle may be trivially accepted if a Boolean AND operation on the inversion of the Boolean disjunction of the three clip bits registers and a trivial accept mask yields a result of zero.
The frame buffer controller may include one or more trivial reject masks and one or more trivial accept masks. In one embodiment, a trivial reject mask and a trivial accept mask are used to select the appropriate regular clip bits when guard band clipping is disabled. In one embodiment, when guard plane clipping is enabled, a trivial reject mask and a trivial accept mask are used to select the appropriate guard band clip bits for the X and Y axes and the appropriate regular clip bits for the Z axis. In various embodiments, when model clipping is enabled, a trivial reject mask and a trivial accept mask are used to select the appropriate model clip bits. The same Boolean operations set forth above can be used for different types of clipping, including regular clipping, guard band clipping, and model clipping, by using different trivial reject masks and trivial accept masks.
An advantage of using one clip bits register per vertex rather than one clip bits register per geometric primitive is the possibility of clip testing in parallel. In some embodiments, for example, a plurality of rendering units set the clip bits on multiple vertices simultaneously. In some embodiments, one or more units in the frame buffer controller perform the Boolean clip testing operations on multiple vertices simultaneously. Clip testing in parallel is generally faster than clip testing in serial.
Furthermore, because an operation on multiple sets of bits in multiple different registers can generally be performed faster than the same operation on multiple sets of bits in a single register, the use of one clip bits register per vertex allows for faster clip testing operations. For example, if the clip bits for all the vertices of a triangle are stored in a single register, then additional Boolean AND operations to mask out the appropriate bits may need to be performed for each vertex. In embodiments using one register per vertex, however, these additional mask operations are avoided.
Based on the Boolean operations described above, the frame buffer controller determines whether the geometric primitive should be trivially accepted, trivially rejected, or clipped. If the geometric primitive is wholly within the clipping boundary, then it is trivially accepted. In other words, the primitive is passed further down the rendering pipeline of the graphics system for continued processing and eventual display on a display device. On the other hand, if the geometric primitive is wholly outside the clipping boundary, then it is trivially rejected. In other words, the primitive is discarded, and the graphics system proceeds with the next geometric primitive in the queue.
If the geometric primitive was neither trivially accepted nor trivially rejected, then the primitive may need to be clipped. If so, then the frame buffer controller sends an interrupt to the rendering unit. The frame buffer controller also sets an exception register with a value indicating the need to clip the geometric primitive. Upon receiving the interrupt, the rendering unit checks the status of the exception register to determine the reason for the interrupt. The frame buffer controller stalls. In this way, the frame buffer controller passes control to the rendering unit.
The rendering unit reads the vertices of the geometric primitive from the frame buffer controller. The geometric primitive is then clipped by the rendering unit. Often, clipping involves recalculating the positions of existing vertices and/or creating new vertices so that the geometric primitive is located entirely within the clipping boundary. In other words, the primitive may be broken up into two or more primitives along the clipping boundary. The result of the clipping operation is a new set of vertices. The rendering unit sends the new vertices, representing a clipped form of the geometric primitive, to the frame buffer controller. The frame buffer controller clears the interrupt and resumes its processing of the geometric primitive, preparing it for eventual display on a display device.